The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2022
Filed:
Jul. 03, 2019
Applicant:
Silicon Storage Technology, Inc., San Jose, CA (US);
Inventors:
Hieu Van Tran, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Stanley Hong, San Jose, CA (US);
Stephen Trinh, San Jose, CA (US);
Anh Ly, San Jose, CA (US);
Han Tran, Ho Chi Minh, VN;
Kha Nguyen, Ho Chi Minh, VN;
Hien Pham, Ho Chi Minh, VN;
Assignee:
SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/56 (2006.01); G11C 11/16 (2006.01); G06N 3/06 (2006.01); G11C 11/4074 (2006.01); G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5642 (2013.01); G06F 17/16 (2013.01); G06N 3/06 (2013.01); G11C 11/1655 (2013.01); G11C 11/1657 (2013.01); G11C 11/4074 (2013.01);
Abstract
Various embodiments of word line decoders, control gate decoders, bit line decoders, low voltage row decoders, and high voltage row decoders and various types of physical layout designs for non-volatile flash memory arrays in an analog neural system are disclosed. Shared and segmented embodiments of high voltage row decoders are disclosed.