The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Mar. 28, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Saurav Prakash, Los Angeles, CA (US);

Sagar Dhakal, Los Altos, CA (US);

Yair Yona, Cupertino, CA (US);

Nageen Himayat, Fremont, CA (US);

Shilpa Talwar, Cupertino, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06N 20/00 (2019.01); G06N 3/08 (2006.01); G06F 15/16 (2006.01); G06K 9/62 (2022.01); G06V 10/94 (2022.01);
U.S. Cl.
CPC ...
G06K 9/6256 (2013.01); G06F 9/5072 (2013.01); G06F 15/16 (2013.01); G06N 3/08 (2013.01); G06N 20/00 (2019.01); G06V 10/95 (2022.01);
Abstract

Systems, apparatuses, methods, and computer-readable media are provided for load partitioning in distributed machine learning (ML) training using heterogeneous compute nodes in a heterogeneous computing environment, where the heterogeneous compute nodes are connected to a master node via respective wireless links. ML computations are performed by individual heterogeneous compute nodes on respective load partitions. The ML computations are balanced across the heterogeneous compute nodes based on knowledge of respective computational and link parameters of the heterogeneous compute nodes. Other embodiments may be described and/or claimed.


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