The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Nov. 10, 2020
Applicant:

Advantest Corporation, Tokyo, JP;

Inventors:

Olaf Pöppe, Tübingen, DE;

Klaus-Dieter Hilliges, Stuttgart, DE;

Alan Krech, Fort Collins, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3183 (2006.01); G01R 31/319 (2006.01); G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G06F 13/20 (2006.01); G06F 11/273 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318307 (2013.01); G01R 31/3177 (2013.01); G01R 31/31712 (2013.01); G01R 31/31713 (2013.01); G01R 31/31724 (2013.01); G01R 31/31905 (2013.01); G01R 31/31907 (2013.01); G01R 31/31908 (2013.01); G01R 31/31926 (2013.01); G06F 11/2733 (2013.01); G06F 13/20 (2013.01);
Abstract

An automated test equipment for testing one or more devices under test comprising a plurality of port processing units, comprising at least a respective buffer memory, and a respective high-speed-input-output, HSIO, interface for connecting with at least one of the devices under test. The port processing units are configured to receive data, store the received data in the respective buffer memory, and provide the data stored in the respective buffer memory to one or more of the connected devices under test via the respective HSIO interface for testing the one or more connected devices under test. A method and computer program for automated testing of one or more devices under test are also described.


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