The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2022
Filed:
Jun. 10, 2020
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Juergen Hoegerl, Regensburg, DE;
Bernd Betz, Obertraubling / Oberhinkofen, DE;
Stephan Bradl, Regensburg, DE;
Daniel Obermeier, Ensdorf, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3675 (2013.01); H01L 21/4842 (2013.01); H01L 21/565 (2013.01); H01L 23/49811 (2013.01); H01L 23/49838 (2013.01); H01L 23/49861 (2013.01); H01L 23/5386 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/83 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/83815 (2013.01);
Abstract
A semiconductor package for double sided cooling includes a first and a second carrier facing each other, at least one power semiconductor chip arranged between the first and second carriers, external contacts arranged at least partially between the first and second carriers, and spring elements arranged between the first and second carriers and configured to keep the first and second carriers at a predefined distance from each other.