The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Nov. 21, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);

Barath Lakshmanan, Chandler, AZ (US);

Tatiana Shpeisman, Menlo Park, CA (US);

Joydeep Ray, Folsom, CA (US);

Ping T. Tang, Edison, NJ (US);

Michael Strickland, Sunnyvale, CA (US);

Xiaoming Chen, Shanghai, CN;

Anbang Yao, Beijing, CN;

Ben J. Ashbaugh, Folsom, CA (US);

Linda L. Hurd, Cool, CA (US);

Liwei Ma, Beijing, CN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06N 20/00 (2019.01); G06T 1/20 (2006.01); G06N 3/04 (2006.01); G06N 3/063 (2006.01); G06N 3/08 (2006.01); G06N 20/10 (2019.01); G06F 9/50 (2006.01); G06F 15/80 (2006.01); G06N 3/00 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 9/3001 (2013.01); G06F 9/30014 (2013.01); G06F 9/3016 (2013.01); G06F 9/30036 (2013.01); G06F 9/30094 (2013.01); G06F 9/30109 (2013.01); G06F 9/30112 (2013.01); G06F 9/3851 (2013.01); G06F 9/3891 (2013.01); G06F 9/50 (2013.01); G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); G06F 15/80 (2013.01); G06N 3/00 (2013.01); G06N 3/0445 (2013.01); G06N 3/0454 (2013.01); G06N 3/063 (2013.01); G06N 3/084 (2013.01); G06N 20/00 (2019.01); G06N 20/10 (2019.01); G06T 1/20 (2013.01); G06F 2213/0026 (2013.01);
Abstract

One embodiment provides for a graphics processing unit (GPU) to accelerate machine learning operations, the GPU comprising an instruction cache to store a first instruction and a second instruction, the first instruction to cause the GPU to perform a floating-point operation, including a multi-dimensional floating-point operation, and the second instruction to cause the GPU to perform an integer operation; and a general-purpose graphics compute unit having a single instruction, multiple thread (SIMT) architecture, the general-purpose graphics compute unit to simultaneously execute the first instruction and the second instruction, wherein the integer operation corresponds to a memory address calculation.


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