Stacked neural device structure and manufacturing method thereof

Abstract

This invention provides a three-dimensional junctionless neuron network device and a manufacturing method thereof. The device comprises: a substrate; and a stack structure is formed on the surface of the substrate, the stack structure comprises alternately stacked gate electrode layers and isolation layers and has a channel hole penetrating the substrate; a weighting gate layer is formed on the surface of the channel hole, and the weighting gate layer has a gap from the bottom of the channel hole; a gate dielectric layer is located on the weight gate between the layer and the gate electrode layer; a tunneling dielectric layer on the surface of the weighting gate layer; a channel layer filled in the channel hole, the channel layer being in contact with the substrate. The invention adopts a vertically stacked isolation layer and gate layer design. The stack structure has an array of channel holes. By forming a vertically distributed neuron network device string in the channel hole and completely surrounding the gate design, it can improve the packing density of the neuron network device, on the other hand, as well as the gate control ability of the neuron network device.