The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 26, 2022
Filed:
Dec. 14, 2020
Nxp Usa, Inc., Austin, TX (US);
Michael Rohleder, Unterschleissheim, DE;
Marcus Mueller, Munich, DE;
George Adrian Ciusleanu, Marasesti, RO;
Marcel Achim, Montreal, CA;
NXP USA, Inc., Austin, TX (US);
Abstract
An embedded information system includes a load control circuit coupleable to an external memory that contains instructions and constant data (organized by variable sized load units, LUs, and where at least one property of a LU is specified within metadata) associated with application code of a software application, at least one processor configured to execute the at least one application code; an internal memory configured as main system memory in a first part and as a cache for storing the instructions and constant data for an execution of the at least one application code from the external memory in a second part. The load control circuit is configured to load the LUs associated with the at least one application code from the external memory with a granularity of a single LU into the internal memory. A cache control circuit, manages the second part, based on metadata corresponding to the LUs, by being configured to: observe the execution of the application code by detecting at least one of: an LU being executed, a change from one LU to another LU within the internal memory; load metadata information corresponding to a LU instance from the external memory or the internal memory, specify a next LU to be loaded by the load control circuit into the second part; and specify a next LU to be evicted from the second part when there is insufficient space for loading the next LU.