The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2022

Filed:

Nov. 26, 2019
Applicant:

Achronix Semiconductor Corporation, Santa Clara, CA (US);

Inventors:

Hansel Desmond Dsilva, Thane West, IN;

Amit Kumar, Noida, IN;

Assignee:

Achronix Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 27/32 (2006.01); G01R 27/06 (2006.01);
U.S. Cl.
CPC ...
G01R 27/32 (2013.01); G01R 27/06 (2013.01);
Abstract

An S-parameter of a reference impedance is determined and converted to a desired mode of operation. Example modes of operation include a single-ended input output mode, a differential input output mode, and a common input output mode. The complex values of the impedance at each port as a function of frequency can be computed using the novel closed-form quadratic S-parameter equation which utilizes the concept of matched networks by setting the reflections and re-reflections to zero through S-parameter renormalization. Using the S-parameter renormalization, the insertion loss corresponding to zero reflections and re-reflections is calculated. Based on the determination of the matching impedance used to reduce the reflections and re-reflections to zero, a parameter of a circuit comprising the network may be modified to reduce noise.


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