The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Jun. 04, 2020
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thorsten Meyer, Regensburg, DE;

Irmgard Escher-Poeppel, Duggendorf, DE;

Klaus Pressel, Regensburg, DE;

Bernd Rakow, Regensburg, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49513 (2013.01); H01L 21/4825 (2013.01); H01L 21/561 (2013.01); H01L 23/3107 (2013.01); H01L 23/4952 (2013.01); H01L 24/08 (2013.01); H01L 24/81 (2013.01); H01L 2224/08258 (2013.01); H01L 2224/8183 (2013.01); H01L 2224/81205 (2013.01);
Abstract

A semiconductor flip-chip package includes a substrate having a first main face, a second main face opposite to the first main face, and one or more conductive structures disposed on the first main face, one or more pillars disposed on at least one of the conductive structures, a semiconductor die having one or more contact pads on a main face thereof, the semiconductor die being connected to the substrate so that at least one of the contact pads is connected with one of the pillars, and an encapsulant disposed on the substrate and the semiconductor die.


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