The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Dec. 18, 2020
Applicant:

Yangtze Memory Technologies Co., Ltd., Hubei, CN;

Inventors:

Liang Xiao, Wuhan, CN;

Shu Wu, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 27/11582 (2017.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/89 (2013.01); H01L 27/11582 (2013.01); H01L 2224/03002 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05666 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01);
Abstract

The present disclosure provides a method of fabricating a semiconductor device. The method can include bonding a first die and a second die face to face, the first die including a substrate, transistors formed on a face side of the first die over a semiconductor layer with an insulating layer between the substrate and the semiconductor layer, and a first contact structure on the face side of the first die extending through the insulating layer. The method can also include exposing the first contact structure from the back side of the first die, forming, from the back side of the first die, a contact hole in the insulating layer to expose the semiconductor layer, and forming, on the back side of the first die, a first pad-out structure connected with the first contact structure and a second pad-out structure, on the contact hole, conductively connected with the semiconductor layer.


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