The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Oct. 23, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Harry-Hak-Lay Chuang, Hsinchu County, TW;

Chia-Hsiang Chen, Hsinchu, TW;

Meng-Chun Shih, Hsinchu, TW;

Ching-Huang Wang, Taoyuan County, TW;

Tien-Wei Chiang, Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/56 (2013.01); H01L 23/3107 (2013.01); H01L 23/4952 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/85035 (2013.01); H01L 2224/85203 (2013.01); H01L 2224/85205 (2013.01);
Abstract

The present disclosure provides a package structure, including a mounting pad having a mounting surface, a semiconductor chip disposed on the mounting surface of the mounting pad, wherein the semiconductor chip includes: a first surface perpendicular to a thickness direction of the semiconductor chip, a second surface opposite to the first surface and facing the mounting surface, and a third surface connecting the first surface and the second surface, a magnetic device disposed in the semiconductor chip, a first magnetic field shielding at least partially surrounding the third surface, a second magnetic field shielding, including a top surface facing the second surface of the semiconductor chip, and a molding surrounding the semiconductor chip, wherein the entire top surface of the second magnetic field shielding is in direct contact with the molding.


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