The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Dec. 17, 2019
Applicants:

Commissariat À L'énergie Atomique ET Aux Energies Alternatives, Paris, FR;

Université Grenoble Alpes, Saint Martin D'Heres, FR;

Centre National DE LA Recherche Scientifique, Paris, FR;

Inventors:

Pierre-Edouard Raynal, Grenoble, FR;

Pascal Besson, Notre-Dame-de-Mésage, FR;

Jean-Michel Hartmann, Montbonnot-Saint-Martin, FR;

Virginie Loup, Saint-Egrève, FR;

Laurent Vallier, Montbonnot-Saint-Martin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 29/08 (2006.01); H01L 21/02 (2006.01); C30B 25/18 (2006.01); C30B 29/40 (2006.01); C30B 29/52 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02598 (2013.01); C30B 25/183 (2013.01); C30B 25/186 (2013.01); C30B 29/08 (2013.01); C30B 29/40 (2013.01); C30B 29/52 (2013.01); H01L 21/0245 (2013.01); H01L 21/02054 (2013.01); H01L 21/0262 (2013.01); H01L 21/02502 (2013.01); H01L 21/02532 (2013.01); H01L 21/02538 (2013.01); H01L 21/02634 (2013.01);
Abstract

A substrate is provided with a monocrystalline silicon-germanium layer with a first surface covered by a protective oxide obtained by wet process and having a degradation temperature. The protective oxide is transformed into fluorinated salt which is then eliminated. The substrate is placed in a processing chamber at a lower temperature than the degradation temperature and is subjected to a temperature ramp up to a higher temperature than the degradation temperature. The first surface is annealed in a hydrogen atmosphere devoid of silicon, germanium and precursors of the materials forming the target layer. When the temperature ramp is applied, a silicon precursor is inserted in the processing chamber between a loading temperature and the degradation temperature to deposit a monocrystalline buffer layer. A mono-crystalline target layer is deposited by chemical vapour deposition.


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