The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2022
Filed:
Dec. 20, 2018
Intel Corporation, Santa Clara, CA (US);
Vedvyas Shanbhogue, Austin, TX (US);
Stephen Van Doren, Portland, OR (US);
Gilbert Neiger, Portland, OR (US);
Barry E. Huntley, Hillsboro, OR (US);
Amy L. Santoni, Scottsdale, AZ (US);
Raghunandan Makaram, Northborough, MA (US);
Hormuzd Khosravi, Portland, OR (US);
Siddhartha Chhabra, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit includes a core and memory controller coupled to a last level cache (LLC). A first key identifier for a first program is associated with physical addresses of memory that store data of the first program. To flush and invalidate cache lines associated with the first key identifier, the core is to execute an instruction (having the first key identifier) to generate a transaction with the first key identifier. In response to the transaction, a cache controller of the LLC is to: identify matching entries in the LLC by comparison of first key identifier with at least part of an address tag of a plurality of entries in a tag storage structure of the LLC, the matching entries associated with cache lines of the LLC; write back, to the memory, data stored in the cache lines; and mark the matching entries of the tag storage structure as invalid.