The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2022
Filed:
Aug. 07, 2020
Intel Corporation, Santa Clara, CA (US);
Jonathan Pearce, Hillsboro, OR (US);
David Sheffield, Portland, OR (US);
Srikanth Srinivasan, Portland, OR (US);
Jeffrey Cook, Portland, OR (US);
Debbie Marr, Portland, OR (US);
Abhijit Davare, Hillsboro, OR (US);
Asit Mishra, Hillsboro, OR (US);
Steven Burns, Portland, OR (US);
Desmond A. Kirkpatrick, Portland, OR (US);
Andrey Ayupov, Santa Clara, CA (US);
Anton Alexandrovich Sorokin, Portland, OR (US);
Eriko Nurvitadhi, Hillsboro, OR (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
An apparatus and method for performing efficient, adaptable tensor operations. For example, one embodiment of a processor comprises: front end circuitry to schedule matrix operations responsive to a matrix multiplication instruction; a plurality of lanes to perform parallel execution of the matrix operations, wherein a lane comprises an arithmetic logic unit to multiply a block of a first matrix with a block of a second matrix to generate a product and to accumulate the product with a block of a third matrix, and wherein the matrix blocks are to be stored in registers within the lane; and broadcast circuitry to broadcast one or more invariant matrix blocks to at least one of different registers within the lane and different registers across different lanes.