The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Mar. 29, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Murugasamy K. Nachimuthu, Beaverton, OR (US);

Mohan J. Kumar, Aloha, OR (US);

Shamanna M. Datta, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2018.01); G06F 8/656 (2018.01); G06F 8/654 (2018.01); G06F 3/06 (2006.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 8/656 (2018.02); G06F 3/0614 (2013.01); G06F 3/0632 (2013.01); G06F 3/0673 (2013.01); G06F 8/654 (2018.02); G06F 9/4401 (2013.01);
Abstract

An interface is provided to update a firmware of a persistent memory module at runtime without restarting an operating system on the platform. The operating system initiates the firmware update by triggering a sleep state or by entering a soft reboot. The interface is capable of preserving the state of the platform for all memory modes that support volatile memory regions, persistent memory regions, or both, and reducing or eliminating the demand for access to memory during the firmware update. The persistent memory module is capable of updating the firmware responsive to a platform instruction generated using the interface, including preserving operational states for memory devices in all memory regions, including memory devices in volatile and persistent memory regions.


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