The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Mar. 31, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jean-Olivier Plouchart, New York, NY (US);

Arvind Kumar, Chappaqua, NY (US);

Dirk Pfeiffer, Croton on Hudson, NY (US);

Takashi Ando, Eastchester, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); H04L 9/08 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0623 (2013.01); G06F 3/0655 (2013.01); G06F 3/0673 (2013.01); H04L 9/088 (2013.01);
Abstract

An approach to creating a tamper-resistant field programmable gate array (FPGA) and remotely reprogramming the tamper-resistant FPGA. In one aspect, determining if an encryption key is stored in a physical unclonable function (PUF) of the FPGA. Further, responsive to the encryption key not being stored in a PUF, writing an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA. In another aspect, writing a program key and a look-up table (LUT) in the tamper resistant memory.


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