The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2022
Filed:
Oct. 31, 2019
United Microelectronics Corp., Hsinchu, TW;
Chih-Hao Pan, Kaohsiung, TW;
Chi-Cheng Huang, Kaohsiung, TW;
Kuo-Lung Li, Tainan, TW;
Szu-Ping Wang, Tainan, TW;
Po-Hsuan Chen, Tainan, TW;
Chao-Sheng Cheng, Taichung, TW;
UNITED MICROELECTRONICS CORP., Hsinchu, TW;
Abstract
A method for fabricating gate structures includes providing a substrate, configured to have a first region and a second region. Dummy gate structures are formed on the substrate at the first and second regions, wherein each of the dummy gate structures has a first gate insulating layer on the substrate and a dummy gate on the first gate insulating layer. An inter-layer dielectric layer is formed over the dummy gate structures. The inter-layer dielectric layer is polished to expose all of the dummy gates. The dummy gates are removed. The first gate insulating layer at the second region is removed. A second gate insulating layer is formed on the substrate at the second region, wherein the first gate insulating layer is thicker than the second insulating layer. Metal gates are formed on the first and the second insulating layer.