The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Jan. 23, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyoukyung Cho, Seoul, KR;

Daesuk Lee, Suwon-si, KR;

Jinnam Kim, Anyang-si, KR;

Taeseong Kim, Suwon-si, KR;

Kwangjin Moon, Hwaseong-si, KR;

Hakseung Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 23/528 (2006.01); H01L 21/027 (2006.01); H01L 21/288 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/30604 (2013.01); H01L 21/76831 (2013.01); H01L 21/76898 (2013.01); H01L 23/5283 (2013.01); H01L 23/53295 (2013.01); H01L 24/08 (2013.01); H01L 24/89 (2013.01); H01L 25/0657 (2013.01); H01L 21/0274 (2013.01); H01L 21/02271 (2013.01); H01L 21/2885 (2013.01); H01L 21/3212 (2013.01); H01L 21/7684 (2013.01); H01L 21/76841 (2013.01); H01L 21/76879 (2013.01); H01L 23/53238 (2013.01); H01L 24/05 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/08147 (2013.01); H01L 2224/80001 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01);
Abstract

Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package comprises a first wiring layer, a first semiconductor substrate on the first wiring layer, a first dielectric layer on the first semiconductor substrate, a landing pad in the first wiring layer, a through hole that penetrates the first semiconductor substrate, the first dielectric layer, and the first wiring layer and exposes the landing pad, the through hole including a first hole and a second hole on a bottom end of the first hole, the second hole having a maximum diameter less than a minimum diameter of the first hole, and a mask layer on an upper lateral surface of the through hole.


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