The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Dec. 09, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Utkarsh Kakaiya, Folsom, CA (US);

Nagabhushan Chitlur, Portland, OR (US);

Rajesh M. Sankaran, Portland, OR (US);

Mohan Nair, Portland, OR (US);

Pratik M. Marolia, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/20 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 12/10 (2016.01); G06F 12/1036 (2016.01);
U.S. Cl.
CPC ...
G06F 13/20 (2013.01); G06F 12/10 (2013.01); G06F 12/1036 (2013.01); G06F 13/404 (2013.01); G06F 13/4068 (2013.01); G06F 13/4221 (2013.01); G06F 13/4295 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/0052 (2013.01);
Abstract

There is disclosed in one example an apparatus, including: a plurality of interconnects to communicatively couple an accelerator device to a host device; and an address translation module (ATM) to provide address mapping between host-physical address (HPA) and guest-physical address (GPA) spaces for the accelerator device, wherein the plurality of devices share a common GPA domain and wherein address mapping is to be associated with only one of the plurality of interconnects.


Find Patent Forward Citations

Loading…