The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2022
Filed:
Oct. 27, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Robert P. Adler, Santa Clara, CA (US);
Robert De Gruijl, San Francisco, CA (US);
Sridhar Lakshmanamurthy, Sunnyvale, CA (US);
Ramadass Nagarajan, Portland, OR (US);
Peter J. Elardo, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 13/42 (2006.01); G06F 15/78 (2006.01); G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
G06F 9/467 (2013.01); G06F 13/4282 (2013.01); G06F 15/76 (2013.01); G06F 15/781 (2013.01); G06F 2213/0026 (2013.01);
Abstract
In one embodiment, a system on chip includes a first endpoint to issue a non-posted memory write transaction to a memory and a Peripheral Component Interconnect (PCI)-based fabric including control logic to direct the non-posted memory write transaction to the memory, receive a completion for the non-posted memory write transaction from the memory and route the completion to the first endpoint. Other embodiments are described and claimed.