The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Mar. 27, 2020
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Kuo-Lung Li, Tainan, TW;

Chih-Hao Pan, Kaohsiung, TW;

Szu-Ping Wang, Tainan, TW;

Po-Hsuan Chen, Tainan, TW;

Chi-Cheng Huang, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 27/1157 (2017.01); H01L 29/66 (2006.01); H01L 27/11573 (2017.01); H01L 29/792 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42344 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 29/40117 (2019.08); H01L 29/66833 (2013.01); H01L 29/792 (2013.01);
Abstract

A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first gate structure disposed on the substrate, a second gate structure disposed on the substrate, and a memory gate structure disposed on the substrate and between the first gate structure and the second gate structure. The memory gate structure at least covers the first gate structure and the second gate structure. The memory gate structure includes a charge storage layer disposed on the substrate and a memory gate layer disposed on the charge storage layer.


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