The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Mar. 05, 2020
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chien-Lan Chiu, Yunlin County, TW;

Chun-Min Cheng, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); G11C 5/06 (2006.01); G11C 5/02 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 27/0688 (2013.01); H01L 27/11582 (2013.01);
Abstract

A three-dimensional memory device includes a plurality of conductive layers and insulating layers alternately formed to define a multi-layer stacked structure on a first region of a semiconductor substrate. The multi-layer stacked structure includes a stair structure and a non-stair structure. A plurality of memory structures are located in the non-stair structure to form a memory array region, and each memory structure passes through the conductive layers and the insulating layers. A plurality of bow-height adjustment features are located in a second region of the semiconductor substrate.


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Chiu, Chien-Lan. (2022). Three dimensional memory device (U.S. Patent No. 11362101). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11362101

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