The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Jun. 13, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Chen Wu, Leuven, BE;

Peter Rabkin, Cupertino, CA (US);

Masaaki Higashitani, Cupertino, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 23/528 (2006.01); H01L 21/762 (2006.01); H01L 21/304 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H01L 27/11551 (2017.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/304 (2013.01); H01L 21/30608 (2013.01); H01L 21/76224 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/5283 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 25/50 (2013.01); H01L 27/11551 (2013.01); H01L 2224/29149 (2013.01); H01L 2224/325 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/83055 (2013.01); H01L 2224/83203 (2013.01); H01L 2224/83931 (2013.01);
Abstract

A method of forming a bonded assembly includes providing a first semiconductor die containing a first substrate, first semiconductor devices, first dielectric material layers overlying the first semiconductor devices, and first metal interconnect structures, providing a second semiconductor die containing a second substrate, second semiconductor devices, second dielectric material layers overlying the second semiconductor devices, and second metal interconnect structures, depositing a manganese layer on a top surface of the first dielectric material layers, disposing the second semiconductor die on the manganese layer such that a surface of the second dielectric material layers contacts the manganese layer, and performing a bonding anneal to bond the first semiconductor die to the second semiconductor die and to convert the manganese layer into a manganese-containing oxide layer, such that the manganese-containing oxide layer is bonded to the first dielectric material layers and the second dielectric material layers.


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