The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Jul. 22, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Po-Lin Peng, Taoyuan, TW;

Yu-Ti Su, Tainan, TW;

Chia-Wei Hsu, New Taipei, TW;

Ming-Fu Tsai, Hsinchu, TW;

Shu-Yu Su, Hsinchu, TW;

Li-Wei Chu, Hsinchu, TW;

Jam-Wem Lee, Hsinchu, TW;

Chia-Jung Chang, Hsinchu, TW;

Hsiang-Hui Cheng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); G01R 31/00 (2006.01); H02H 1/00 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); G01R 31/001 (2013.01); H02H 1/0007 (2013.01);
Abstract

A device is disclosed herein. The device includes an electrostatic discharge (ESD) detector, a bias generator, and an ESD driver including at least two transistors coupled to each other in series. The ESD detector is configured to detect an input signal and generate a detection signal in response to an ESD event being detected. The bias generator is configured to generate a bias signal according to the detection signal. The at least two transistors are controlled according to the bias signal and a logic control signal, and the input signal is applied across the at least two transistors.


Find Patent Forward Citations

Loading…