The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Aug. 27, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Hisham Abu Salah, Majdal shams, IL;

Arthur Leonard Brown, Weston, MA (US);

Russell J. Fenger, Beaverton, OR (US);

Deepak Samuel Kirubakaran, Hillsboro, OR (US);

Asit K. Mallick, Saratoga, CA (US);

Jun Pan, Portland, OR (US);

Srinivas Pandruvada, Beaverton, OR (US);

Efraim Rotem, Haifa, IL;

Arjan Van De Ven, Portland, OR (US);

Eliezer Weissmann, Haifa, IL;

Rafal J. Wysocki, Warsaw, PL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 11/34 (2006.01); G06F 11/30 (2006.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3433 (2013.01); G06F 9/4856 (2013.01); G06F 9/4893 (2013.01); G06F 9/505 (2013.01); G06F 11/3024 (2013.01); G06F 9/5044 (2013.01);
Abstract

In an embodiment, a processor includes multiple processing engines and a power control unit. The power control unit is to: maintain a first utilization metric for a first processing engine; detect a thread transfer from a first processing engine to a second processing engine; and generate, using the first utilization metric for the first processing engine, a second utilization metric for a second processing engine. Other embodiments are described and claimed.


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