The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2022

Filed:

Aug. 03, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Chih-Fan Huang, Kaohsiung, TW;

Hung-Chao Kao, Taipei, TW;

Yuan-Yang Hsiao, Taipei, TW;

Tsung-Chieh Hsiao, Changhua County, TW;

Hsiang-Ku Shen, Hsinchu, TW;

Hui-Chi Chen, Hsinchu County, TW;

Dian-Hau Chen, Hsinchu, TW;

Yen-Ming Chen, Hsin-Chu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 49/02 (2006.01); H01L 21/311 (2006.01); H01L 27/22 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 28/60 (2013.01); H01L 21/31116 (2013.01); H01L 27/224 (2013.01);
Abstract

The present disclosure is directed to a method of fabrication a semiconductor structure. The method includes providing a substrate and forming a bottom electrode over the substrate, wherein a terminal end of the bottom electrode has a tapered sidewall. The method also includes depositing an insulating layer over the bottom electrode and forming a top electrode over the insulating layer, wherein a terminal end of the top electrode has a vertical sidewall.


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