The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2022
Filed:
Mar. 31, 2021
Changxin Memory Technologies, Inc., Anhui, CN;
Changxin Memory Technologies, Inc., Hefei, CN;
Abstract
The present invention provides a wafer, semiconductor device and a method for manufacturing the same, in relation to the field of semiconductor technology. The wafer includes: a substrate; a dielectric layer, disposed on a surface of the substrate; a wafer acceptance test circuit, formed in the dielectric layer; a trench, formed in the dielectric layer and situated on a side of the wafer acceptance test circuit. The wafer acceptance test circuit may comprise a metal interconnection layer. The trench may be filled with a protective layer and has a depth greater than or equal to a depth of the wafer acceptance test circuit. When dicing dies along the scribe line area, the stress caused by dicing can be buffered and cracks may be reduced due to the elasticity of the protective layer. Moreover, the trench and the protective layer filled in the trench can prevent the cracks from extending, thereby improving the yield and stability of the dies.