The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2022

Filed:

Nov. 05, 2019
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Nikesh Gupta, Hyderabad, IN;

Harshit Tiwari, San Diego, CA (US);

Ashish Bajaj, Hyderabad, IN;

Maheshwar Thakur Singh, Hyderabad, IN;

Assignee:

Qualcomm Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3287 (2019.01); G06F 1/3296 (2019.01); H04W 52/02 (2009.01); G06F 1/3234 (2019.01); G06F 1/20 (2006.01); G06F 1/3206 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/206 (2013.01); G06F 1/3206 (2013.01); G06F 1/3278 (2013.01); G06F 1/3296 (2013.01); H04W 52/0296 (2013.01); Y02D 10/00 (2018.01); Y02D 30/70 (2020.08);
Abstract

A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.


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