The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2022
Filed:
Mar. 27, 2020
Intel Corporation, Santa Clara, CA (US);
Christopher Lake, Folsom, CA (US);
Vaibhav Shankar, Hillsboro, OR (US);
Prashant Kodali, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques and mechanisms for a power management circuit to monitor a power domain during one or more attempts to configure a low power state of the power domain. In an embodiment, the one or more attempts are performed during an instance of a local power state at a processor that is coupled to the power management circuit. The monitoring is to detect for a condition wherein the power domain has been in a power state, other than the low power state, for longer than a predetermined threshold length of time. Where the condition is detected, the power management circuit generates one or more signals which change the local power state of the processor, or interrupt an operating system that is executed with the processor. In another embodiment, the power management circuit provides analytic data based on the monitoring of the one or more attempts.