The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2022
Filed:
Nov. 14, 2019
Applicant:
Skyworks Solutions, Inc., Irvine, CA (US);
Inventors:
Jiro Yota, Westlake Village, CA (US);
Hong Shen, Palo Alto, CA (US);
Viswanathan Ramanathan, Thousand Oaks, CA (US);
Assignee:
SKYWORKS SOLUTIONS, INC., Irvine, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 3/02 (2006.01); H03H 3/08 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H03H 9/05 (2006.01); H03H 9/10 (2006.01); H03H 9/64 (2006.01); H01L 25/16 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/58 (2006.01); H01L 41/047 (2006.01); H01L 23/00 (2006.01); H01L 21/683 (2006.01); H01L 23/06 (2006.01); H03H 9/02 (2006.01); H01L 23/26 (2006.01); H01L 23/08 (2006.01); H01L 23/66 (2006.01); H01L 41/04 (2006.01); H01L 41/053 (2006.01); H01L 41/187 (2006.01); H01L 49/02 (2006.01); H01L 29/861 (2006.01); H01L 41/33 (2013.01); H03H 9/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/30604 (2013.01); H01L 21/6835 (2013.01); H01L 23/06 (2013.01); H01L 23/3114 (2013.01); H01L 23/3171 (2013.01); H01L 23/481 (2013.01); H01L 23/585 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/89 (2013.01); H01L 41/0475 (2013.01); H03H 3/02 (2013.01); H03H 3/08 (2013.01); H03H 9/0547 (2013.01); H03H 9/1007 (2013.01); H03H 9/1064 (2013.01); H03H 9/64 (2013.01); H01L 21/76898 (2013.01); H01L 21/78 (2013.01); H01L 23/66 (2013.01); H01L 28/10 (2013.01); H01L 28/40 (2013.01); H01L 29/861 (2013.01); H01L 41/1875 (2013.01); H01L 41/1876 (2013.01); H01L 41/33 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01); H01L 2223/6627 (2013.01); H01L 2224/08145 (2013.01); H03H 9/0004 (2013.01); H03H 9/02559 (2013.01);
Abstract
A method of fabricating an electronics package includes forming a cavity in a first surface of a semiconductor substrate, forming one or more passive devices on the semiconductor substrate, forming a microelectromechanical device on a piezoelectric substrate, and bonding the semiconductor substrate to the piezoelectric substrate with the microelectromechanical device disposed within the cavity.