The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2022
Filed:
Nov. 15, 2019
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Francisco Javier Santos Rodriguez, Villach, AT;
Fabian Craes, Soest, DE;
Barbara Eichinger, Villach, AT;
Martin Mischitz, Wernberg, AT;
Frederik Otto, Recklinghausen, DE;
Fabien Thion, Villach, AT;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/428 (2006.01); H01L 21/782 (2006.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 21/428 (2013.01); H01L 21/4867 (2013.01); H01L 21/782 (2013.01); H01L 24/27 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68354 (2013.01); H01L 2221/68381 (2013.01); H01L 2924/12 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13092 (2013.01);
Abstract
A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.