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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11328984 B1

PDFFull Text
Date of Patent:
May. 10, 2022

Filed:

Dec. 29, 2017

Multi-die integrated circuit packages and methods of manufacturing the same

Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

You Chye How, Melaka, MY;

Huay Yann Tay, Melaka, MY;

Franklin Santos Marcelino, Melaka, MY;

Assignee:

TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);

Attorneys:

Dawn Jos

Charles A. Brill

Frank D. Cimino

Primary Examiner:

Thanh Y Tran

Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/4839 (2013.01); H01L 21/4842 (2013.01); H01L 21/56 (2013.01); H01L 21/561 (2013.01); H01L 23/3121 (2013.01); H01L 23/3135 (2013.01); H01L 23/4951 (2013.01); H01L 23/49503 (2013.01); H01L 23/49513 (2013.01); H01L 23/49537 (2013.01); H01L 23/49551 (2013.01); H01L 23/49582 (2013.01); H01L 23/49805 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/73 (2013.01); H01L 25/50 (2013.01); H01L 23/49548 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/32141 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/32257 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48177 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49052 (2013.01); H01L 2224/49109 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00014 (2013.01);
Abstract

Multi-die integrated circuit packages and methods of manufacturing the same are disclosed. An example integrated circuit package includes a first leadframe, a first die on a first side of the first leadframe, and a second die on a second side of the first leadframe opposite the first side. The example integrated circuit package further includes external second leadframe separate from the first leadframe.

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