The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Jan. 14, 2021
Applicant:

Yangtze Memory Technologies Co., Ltd., Hubei, CN;

Inventor:

Weijun Wan, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 11/5628 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01);
Abstract

In a method of programming a memory device, inhibit information is stored to first latch structures and second latch structures. A first state programming voltage is applied to data lines of memory cells of the memory device to program the memory cells to the first state. A first state verification voltage is applied to the data lines of the memory cells to perform a first state verification operation on the memory cells. The first state verification operation verifies first state threshold voltages of the memory cells based on a first target value and also generates failure pattern data of the first state verification operation. The failure pattern data is then stored to the second latch structures. Further, a first level adjusted verification voltage is applied to the data lines of a portion of the memory cells that fails the first level verification operation to perform a first level adjusted verification operation.


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