The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Oct. 09, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jackson N. Callaghan, Milpitas, CA (US);

Kazuaki Ohara, San Jose, CA (US);

Ji-Hye G. Shin, Palo Alto, CA (US);

Vyjayanthi Prasad, San Jose, CA (US);

Rosa M. Avila-Hernandez, Boise, ID (US);

Gitanjali T. Ghosh, Boise, ID (US);

Rachael R. Skreen, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); G01R 31/3177 (2006.01); G06F 1/06 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3096 (2013.01); G01R 31/3177 (2013.01); G06F 1/06 (2013.01); G06F 11/3034 (2013.01); G06F 11/3089 (2013.01); G06F 13/1668 (2013.01); G06F 13/1689 (2013.01);
Abstract

An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.


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