The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2022
Filed:
Jul. 03, 2019
Synopsys, Inc., Mountain View, CA (US);
Vivek Gaur, Marlborough, MA (US);
Stanislav Margolin, Boston, MA (US);
Chengdong Jiang, Boston, MA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
The independent claims of this patent signify a concise description of embodiments. A method is provided for parallel simulation using synchronization during simulation. The method comprises executing a plurality of threads in parallel, identifying a first event block and a second event block of a circuit design, calculating a minimum delay (minDelay) based on a current simulation time, scheduled times for execution of the first event block and the second event block, and causal delays (CausalDelay) of the first event block and the second event block, and scheduling a next synchronization point based on the minimum delay, the next synchronization point being a next simulation time at which the plurality of threads synchronize to a common clock. This Abstract is not intended to limit the scope of the claims.