The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2022

Filed:

Sep. 28, 2018
Applicant:

Juniper Networks, Inc., Sunnyvale, CA (US);

Inventors:

Peng Su, Sunnyvale, CA (US);

Bernard H. Glasauer, Saratoga, CA (US);

Assignee:

Juniper Networks, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/67 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4853 (2013.01); H01L 21/67092 (2013.01); H01L 23/49816 (2013.01); H01L 23/562 (2013.01); H01L 24/16 (2013.01); H01L 2224/1607 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/3511 (2013.01); H05K 1/181 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10734 (2013.01);
Abstract

A method includes positioning an integrated circuit package in a coining apparatus having a fixture and a pressing plate. The integrated circuit package includes a substrate, an integrated circuit device disposed on a top surface of the substrate, and a plurality of solder balls disposed on a bottom surface of the integrated circuit package. The fixture includes a support structure and a cavity. The cavity receives the integrated circuit device while the support structure supports portions of a top surface of the integrated circuit package. The pressing plate is pressed against two or more of the solder balls, coining the two or more solder balls until each solder ball has a desired coined surface profile.


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