The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Apr. 02, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Bongyong Lee, Suwon-si, KR;

Taehun Kim, Gwacheon-si, KR;

Minkyung Bae, Hwaseong-si, KR;

Myunghun Woo, Suwon-si, KR;

Doohee Hwang, Uiwang-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11556 (2017.01); H01L 27/11573 (2017.01); H01L 27/11529 (2017.01); H01L 27/1157 (2017.01); H01L 27/11524 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11556 (2013.01); H01L 27/11573 (2013.01);
Abstract

A vertical semiconductor layer includes a common source semiconductor layer on a substrate, a support layer on the common source semiconductor layer, gates and interlayer insulating layers alternately stacked on the support layer, a channel pattern extending in a first direction perpendicular to an upper surface of the substrate while penetrating the gates and the support layer, a sidewall of the support layer facing the channel pattern being offset relative to sidewalls of the gates facing the channel pattern, and an information storage layer extending between the gates and the channel pattern, the information storage layer extending at least to the sidewall of the support layer facing the channel pattern.


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