The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2022
Filed:
Sep. 28, 2020
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Hyungjun Jeon, Seoul, KR;
Kwangjin Moon, Hwaseong-si, KR;
Hakseung Lee, Seoul, KR;
Hyoukyung Cho, Seoul, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80006 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01);
Abstract
A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.