The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2022

Filed:

Oct. 20, 2020
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventors:

Hui-Lin Chen, Keelung, TW;

Mao-Ying Wang, New Taipei, TW;

Yu-Ting Lin, New Taipei, TW;

Lai-Cheng Tien, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10894 (2013.01); H01L 27/10823 (2013.01); H01L 27/10876 (2013.01); H01L 27/10888 (2013.01); H01L 27/10897 (2013.01);
Abstract

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device includes providing a substrate including an array area and a peripheral area adjacent to the array area, forming word line structures and source/drain regions in the array area, and a word line protection layer on the array area, forming a first hard mask layer over the substrate and having a step height adjacent to a border between the array area and the peripheral area, forming a bit line contact in the array area and between the word line structures by using the first hard mask layer as a pattern guide, and forming a gate electrode layer on the peripheral area.


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