The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2022
Filed:
May. 12, 2017
Silicon Storage Technology, Inc., San Jose, CA (US);
The Regents of the University of California, Oakland, CA (US);
Farnood Merrikh Bayat, Goleta, CA (US);
Xinjie Guo, Goleta, CA (US);
Dmitri Strukov, Goleta, CA (US);
Nhan Do, Saratoga, CA (US);
Hieu Van Tran, San Jose, CA (US);
Vipin Tiwari, Dublin, CA (US);
Mark Reiten, Alamo, CA (US);
Silicon Storage Technology, Inc., San Jose, CA (US);
Abstract
An artificial neural network device that utilizes one or more non-volatile memory arrays as the synapses. The synapses are configured to receive inputs and to generate therefrom outputs. Neurons are configured to receive the outputs. The synapses include a plurality of memory cells, wherein each of the memory cells includes spaced apart source and drain regions formed in a semiconductor substrate with a channel region extending there between, a floating gate disposed over and insulated from a first portion of the channel region and a non-floating gate disposed over and insulated from a second portion of the channel region. Each of the plurality of memory cells is configured to store a weight value corresponding to a number of electrons on the floating gate. The plurality of memory cells are configured to multiply the inputs by the stored weight values to generate the outputs.