The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Sep. 21, 2017
Applicant:

Soitec, Bernin, FR;

Inventors:

David Sotta, Grenoble, FR;

Jean-Marc Bethoux, La Buisse, FR;

Oleg Kononchuk, Theys, FR;

Assignee:

Soitec, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02645 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/02488 (2013.01); H01L 21/02532 (2013.01); H01L 21/02538 (2013.01); H01L 21/02639 (2013.01);
Abstract

A structure that can be used to manufacture at least one active layer made of a III-V material thereon includes a substrate comprising a carrier having a main face, a dielectric layer located on the main face of the carrier, and a plurality of single-crystal semiconductor islands located directly on the dielectric layer. The islands have an upper surface in order to serve as a seed surface for the growth of the active layer. The structure further comprises a seed layer located between the single-crystal semiconductor islands, directly on the portion of the dielectric layer that is not covered by the islands, without masking the upper surface of the islands, so that the dielectric layer is not exposed to the external environment.


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