The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Dec. 31, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Chuan Teng, Zhubei, TW;

Chun-Yin Tsai, Hsinchu, TW;

Chia-Hua Chu, Zhubei, TW;

Chun-Wen Cheng, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 41/113 (2006.01); B81B 3/00 (2006.01); B81C 1/00 (2006.01); H04R 19/00 (2006.01);
U.S. Cl.
CPC ...
B81B 3/001 (2013.01); B81B 3/007 (2013.01); B81C 1/00158 (2013.01); H01L 41/1138 (2013.01); H04R 19/005 (2013.01); B81B 2201/0257 (2013.01); B81B 2203/0127 (2013.01); B81B 2203/0315 (2013.01); B81B 2207/07 (2013.01);
Abstract

Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first dielectric layer over a substrate and forming a first recess in the first dielectric layer. The method also includes conformally forming a first movable membrane over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion in the first recess. The method further includes forming a second dielectric layer over the first movable membrane and partially removing the substrate, the first dielectric layer, and the second dielectric layer to form a cavity. In addition, the first corrugated portion of the first movable membrane is partially sandwiched between the first dielectric layer and the second dielectric layer.


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