The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2022
Filed:
Dec. 20, 2018
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventors:
Yi-Feng Chang, Xinbei, TW;
Jam-Wem Lee, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/73 (2006.01); H01L 29/735 (2006.01); H01L 29/861 (2006.01); H01L 29/872 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0259 (2013.01); H01L 27/0255 (2013.01); H01L 27/067 (2013.01); H01L 29/0649 (2013.01); H01L 29/0808 (2013.01); H01L 29/0821 (2013.01); H01L 29/1008 (2013.01); H01L 29/7302 (2013.01); H01L 29/735 (2013.01); H01L 29/8611 (2013.01); H01L 29/872 (2013.01);
Abstract
A device comprises a high voltage n well and a high voltage p well over a buried layer, a first low voltage n well over the high voltage n well, wherein a bottom portion of the first low voltage n well is surrounded by the high voltage n well, an N+ region over the first low voltage n well, a second low voltage n well and a low voltage p well over the high voltage p well, a first P+ region over the second low voltage n well and a second P+ region over the low voltage p well.