The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Dec. 14, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Yunhong Jiang, San Jose, CA (US);

Chao Peng, Beijing, CN;

Yao Zu Dong, Shanghai, CN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 16/11 (2019.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/45545 (2013.01); G06F 9/30123 (2013.01); G06F 9/45558 (2013.01); G06F 16/128 (2019.01); G06F 9/455 (2013.01); G06F 2009/45575 (2013.01); G06F 2009/45579 (2013.01);
Abstract

A host machine includes a guest machine, a device emulator, and a hypervisor communicably coupled to the guest machine and the device emulator. The guest machine executes a non-real time thread that causes a non-real time I/O emulation by the device emulator. Responsive to receipt of a real time thread by the guest machine, the hypervisor determines whether the non-real time I/O emulation is abortable or non-abortable. If abortable, the hypervisor aborts the non-real time thread and causes the guest machine to execute the real time thread. Upon completing the execution of the real time thread, the hypervisor causes the guest machine to revert to a non-real time context based on a previous system snapshot. Upon establishing the non-real time context, the hypervisor causes the guest machine to execute the previously aborted non-real time thread.


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