The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Dec. 19, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ramakrishna G. Poolla, Hyderabad, IN;

Krishna C. Patakamuri, Hyderabad, IN;

James D. Wesselkamper, Albuquerque, NM (US);

Jason J. Moore, Albuquerque, NM (US);

Edward S. Peterson, Queen Creek City, AZ (US);

Steven E. McNeil, Rio Rancho, NM (US);

Assignee:

XLNX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G06F 21/44 (2013.01); H04L 9/32 (2006.01); G06F 21/76 (2013.01); H04L 9/30 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31719 (2013.01); G01R 31/3177 (2013.01); G01R 31/31705 (2013.01); G06F 21/44 (2013.01); G06F 21/76 (2013.01); H04L 9/30 (2013.01); H04L 9/3239 (2013.01); H04L 9/3247 (2013.01);
Abstract

Disclosed approaches for controlling debug access to an integrated circuit (IC) device include receiving a debug packet by a debug interface circuit of the IC device. The debug interface circuit authenticates the debug packet in response to the debug packet having a command code that specifies enable debug mode or a command code that specifies disable debug mode. In response to the debug packet passing authentication and the command code specifying enable, the debug interface circuit enables debug mode of the IC device. In response to the debug packet passing authentication and the command code specifying disable, the debug interface circuit disables the debug mode of the IC device. In response to the debug packet failing authentication, the debug interface circuit rejects the debug packet.


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