The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2022

Filed:

Sep. 17, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Somnath Kundu, Hillsboro, OR (US);

Abhishek Agrawal, Portland, OR (US);

Brent Carlton, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/197 (2006.01); H03L 7/099 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1976 (2013.01); H03L 7/091 (2013.01); H03L 7/0998 (2013.01);
Abstract

A reference sampling Type-I fractional-N PLL directly samples the reference clock and therefore does not use a reference buffer. Here, a phase-detector is a passive sampling switch which neither consumes any power nor generates any noise. Therefore, all the major contributors of in-band phase-noise are eliminated by the reference sampling Type-I fractional-N divider. A double sampling phase-detector with a switched-capacitor passive voltage interpolator circuit is used to achieve fractional-N output. To achieve a high resolution of the voltage interpolator or the switched capacitor, a sigma-delta modulator is used.


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