The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Sep. 15, 2017
Applicant:

Utica Leaseco, Llc, Rochester Hills, MI (US);

Inventors:

Brendan M. Kayes, San Francisco, CA (US);

Gang He, Cupertino, CA (US);

Sylvia Spruytte, Palo Alto, CA (US);

I-Kang Ding, Sunnyvale, CA (US);

Gregg Higashi, San Jose, CA (US);

Assignee:

UTICA LEASECO, LLC, Rochester Hills, MI (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0725 (2012.01); H01L 31/18 (2006.01); H01L 31/0236 (2006.01); H01L 31/0232 (2014.01); H01L 31/0216 (2014.01); H01L 31/0735 (2012.01); H01L 31/0224 (2006.01); H01L 31/055 (2014.01);
U.S. Cl.
CPC ...
H01L 31/0725 (2013.01); H01L 31/0236 (2013.01); H01L 31/02167 (2013.01); H01L 31/02327 (2013.01); H01L 31/02363 (2013.01); H01L 31/022441 (2013.01); H01L 31/055 (2013.01); H01L 31/0735 (2013.01); H01L 31/184 (2013.01); H01L 31/1844 (2013.01); H01L 31/1892 (2013.01); H01L 31/1896 (2013.01); Y02E 10/544 (2013.01);
Abstract

An optoelectronic semiconductor device is disclosed. The device comprises a plurality of stacked p-n junctions (e.g., multi junction device). The optoelectronic semiconductor device includes a n-doped layer disposed below the p-doped layer to form a p-n layer such that electric energy is created when photons are absorbed by the p-n layer. Recesses are formed on top of the p-doped layer at the top of the plurality of stacked p-n junctions. The junctions create an offset and an interface layer is formed on top of the p-doped layer at the top of the plurality stacked p-n junctions. The device also includes a window layer disposed below the plurality stacked p-n junctions. In another aspect, one or more optical filters are inserted into a device to enhance its efficiency through photon recycling. The device can be fabricated by epitaxial growth on a substrate and removed from the substrate through a lift off process.


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