The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

May. 28, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Alan Kalitsov, San Jose, CA (US);

Derek Stewart, Livermore, CA (US);

Daniel Bedau, San Jose, CA (US);

Gerardo Bertero, Redwood City, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11585 (2017.01); H01L 21/28 (2006.01); H01L 29/417 (2006.01); H01L 29/51 (2006.01); H01L 29/778 (2006.01); G11C 11/22 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11585 (2013.01); G11C 11/2273 (2013.01); G11C 11/2275 (2013.01); H01L 29/40111 (2019.08); H01L 29/41725 (2013.01); H01L 29/516 (2013.01); H01L 29/778 (2013.01);
Abstract

A ferroelectric memory device contains a two-dimensional semiconductor material layer having a band gap of at least 1.1 eV and at least one of a thickness of 1 to 5 monolayers of atoms of the semiconductor material or includes a two-dimensional charge carrier gas layer, a source contact contacting a first portion of the two-dimensional semiconductor material layer, a drain contact contacting a second portion of the two-dimensional semiconductor material layer, a ferroelectric memory element located between the source and drain contacts and adjacent to a first surface of the two-dimensional semiconductor material layer, and a conductive gate electrode located adjacent to the ferroelectric memory element.


Find Patent Forward Citations

Loading…