The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

May. 31, 2019
Applicant:

Crossbar, Inc., Santa Clara, CA (US);

Inventor:

Mehdi Asnaashari, Danville, CA (US);

Assignee:

Crossbar, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0023 (2013.01); G11C 7/109 (2013.01); G11C 7/1057 (2013.01); G11C 7/1063 (2013.01); G11C 7/1069 (2013.01); G11C 7/1084 (2013.01); G11C 7/1096 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01);
Abstract

A non-volatile memory device having processing logic embedded within a memory bank of the non-volatile memory device is disclosed herein. By way of example, commands for controlling the processing logic can be exposed to a host device, enabling the host device to activate processing capacity of the memory bank in conjunction with a memory operation. The processing capacity can be directed by a data command, transmitted by the host device, at read or write data identified by the memory operation. Read data can be processed by the memory bank before being output onto a data interface connected to the memory bank. Likewise, write data received at the memory bank can be processed in conjunction with storing the write data in the non-volatile memory device. A disclose memory device can therefore implement internal processing in conjunction with reading or writing data to a memory device comprising respective banks of two-terminal non-volatile memory.


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