The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2022

Filed:

May. 13, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mark Bordogna, Andover, MA (US);

Janardhan Satyanarayana, Allentown, PA (US);

Yoni Landau, Or-Aqiva, IL;

Diwakar Suvvari, Bengaluru, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/07 (2006.01); H04J 3/06 (2006.01); H04L 1/00 (2006.01); H04L 43/106 (2022.01);
U.S. Cl.
CPC ...
H04J 3/073 (2013.01); H04J 3/0661 (2013.01); H04J 3/0682 (2013.01); H04J 3/0697 (2013.01); H04L 1/0046 (2013.01); H04L 1/0057 (2013.01); H04L 1/0067 (2013.01); H04L 43/106 (2013.01);
Abstract

In a transceiver, the accuracy of a packet time stamp can be improved by compensating for errors introduced by processing of the packet. A received packet can be received via multiple lanes. A packet time stamp can be measured using a start of frame delimiter (SFD). A last arriving lane can be used to provide a recovered clock signal. A phase offset between the recovered clock signal and the system clock of the transceiver can be used to adjust the time stamp. A position of the SFD within a data block can be used to adjust the time stamp. A position of the data block within a combined group of data blocks can be used to adjust the time stamp. Also, a serializer-deserializer delay associated with the last arriving lane can be used to adjust the time stamp.


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